Semiconductor devices such as plastic leaded chip carriers (PLCC) and small outline integrated circuits (SOIC) are presently being utilized in printed circuit board systems where the devices are surface mounted on the circuit boards by soldering J-shaped device leads to respective portions of the printed circuit on the board. The device leads are spaced from each other in rows extending along edges of the device with the longer legs of the J-shape depending down from the main body of the semiconductor device and with the shorter legs of the J-shape preferably extending inwardly under the device body to be accommodated between the device and the printed circuit board. The shorter legs of the leads are curved to provide a convex arc-shaped outer surface and those arc-shaped lead surfaces are soldered to respective portions of the printed circuits for electrically connecting the leads in the circuit and for surface mounting the device on the board. In some of the devices, bumper pads of plastic or other electrically insulating material on the semiconductor device body engage inner surfaces of the shorter curved legs of the J-shaped leads for providing more secure mounting of the device on the printed circuit board. During use of wave, vapor phase or other conventional soldering techniques in mounting the devices on the board, it is found that sometimes an excessive amount of solder is wicked or drawn up on the inner surfaces of the J-shaped leads to cause solder bridging between device leads and it is frequently found that, particularly where vapor phase soldering or the like is used, the quantity of solder provided on the outer surfaces of the curved shorter lead legs is excessively depleted by solder being wicked or drawn up on the inner surfaces of the leads so that there is poor electrical connection of the device to the printed circuit or poor mechanical mounting of the devices on the board.